This invention relates generally to random access memory circuits and more particularly, it relates to a fracturable x-y random access memory (RAM) array which performs simultaneously random access of data and random fracturing of the array by utilizing a common address.
Specifically, the present invention is directed to improvements in a random access memory which includes a plurality of static cross-coupled memory cells arranged in an x-y array organization which performs pushing of data into a stack and popping of data from a stack as well as providing random, read/write access to the memory cells. In addition, there is provided a memory cell formed of a pair of cross-coupled latches which includes means for controlling the direction of shifting in a bidirectional shift. A plurality of such memory cells may be arranged in a column for use as a master-slave shift register wherein data is insertable/deletable in the middle of the shift register.
Ordinarily a computer of any size, whether it is a main frame, a minicomputer or a microcomputer, will require the use serial memory storage devices or shift registers. These shift registers consist typically of ordered circuit arrays which provide a higher circuit density than non-ordered configurations. The large volume production of such shift registers lowers dramatically the cost per equivalent gate. A new data word is insertable at a selected address in a shift register, and a stored data word is readable (deletable) from a selected address. Upon data word insertion (pushing), all subsequent data below the selected address is shifted or pushed down one address. Upon data word deletion (popping), all subsequent data below the selected address is shifted or popped up one address.
However, in the prior art shifted registers the shifting of data occurred only in one direction (unidirectional). In addition, these prior shift registers lose its random access capability typical of addressable random access memories. Further, for any sizeable shift register the switching current required to shift the data becomes relatively large. There is shown a typical one-bit storage cell 120 formed of a master section 122 and a slave section 124 of such a prior art shift register in FIG. 1 of the drawings.
Accordingly, it would be desirable to provide a plurality of cross-coupled random access memory cells arranged in an x-y array which performs bidirectional shifting without causing high switching current and operates in the same manner as a conventional read/write RAM. Further, it is also expedient that the pushing and popping of data be performed on the memory array at the same bit address that is used to "fracture" the array. The term "fracture" as used herein is defined as splitting the array at a unique address such that all memory cells in the array with addresses higher (or lower) than the fracture address shift and the addresses lower (or higher) than the fracture address maintain their data unchanged. It would also be desirable to provide a memory cell formed of a pair of cross-coupled latches which includes means for controlling the direction of shifting in a bidirectional shift.